Boundary Scan Test Software

 

ScanExpress TPG
Test Pattern Generator

The ScanExpress TPG™ Intelligent Test Pattern Generator is a state-of-the-art automatic boundary-scan test pattern generation tool that takes the process of boundary-scan automation to a whole new level in performance and ease of use. ScanExpress TPGautomatically generates test patterns that facilitate the pin-level fault detection and isolation of all boundary-scan testable nets on a printed circuit board (PCB). ScanExpress TPG also creates test vectors to detect faults on the pins of non scannable components such as clusters and memories that are surrounded by scannable devices. ScanExpress TPG accepts most industry recognized CAE/CAD netlists.

ScanExpress TPG provides an integrated development environment (IDE) in which the user can generate boundary-scan tests from scratch, invoke the ScanExpress DFT Analyzer™ to produce test coverage reports, and invoke ScanExpress Runner™ to execute generated tests, all from a single Graphical User Interface (GUI). The user starts with the basic board design files, adds supplemental information, generates test vectors, creates test coverage reports, and executes the tests by using the descriptive icons located on the shortcuts bar.

By utilizing ScanExpress TPG, both experienced and novice users can create boundary-scan test vectors in a fraction of the time it takes to develop these test vectors using legacy test pattern generators. Test development time is greatly reduced by automating and integrating many of the tasks that the user previously had to perform manually.

ScanExpress TPG greatly reduces the number of keystrokes and mouse clicks and eliminates text editing wherever possible. By maximizing the automation behind the complete process, boundary-scan test procedures can be developed with the least amount of time and effort while ensuring that the final test procedure is of the highest possible quality.

ScanExpress TPG also supports IEEE-1149.6, SerDes devices, BIST (Built-In Self-Test), and hierarchical bridge devices such as the TI 8996 ASP, TI 8997 Scan Path Linker, National SCANPSC110F, National SCANSTA111, National SCANSTA112, Firecron JTS06Bu, and Corelis ScanBridge.  For complete information on ScanExpress TPG, please refer to the detailed datasheet for this product..

Datasheet.

 

ScanExpress DFT
Test Coverage analysis software

ScanExpress DFT Analyzer™ is a test coverage calculation tool that provides users with precise pin, net, and device coverage statistics on any board targeted for boundary-scan testing. The tool is able to quantify test coverage into meaningful numbers in which a user can immediately translate to identify areas of a board that are fully tested, partially tested, or are not tested at all. The tool also helps design and test engineers increase fault coverage and reduce boundary-scan test program development time by identifying fault coverage limitations.

ScanExpress DFT Analyzer intelligently combines the testability reports generated byScanExpress TPG and provides both summary and detailed test coverage reports for the board. Users can view the reports by using the built-in report browser or by importing the data directly to a spreadsheet or database. The combined test coverage reports help engineers to maximize the value of boundary-scan by reducing the need for external test point access to specific nets and pins. The figure to the right depicts a test coverage summary report from the main ScanExpress DFT Analyzer window.

ScanExpress DFT Analyzer is ideally used after schematic capture and before PCB layout. At this stage of product development, ScanExpress DFT Analyzer efficiently creates a set of comprehensive test coverage reports that identify all of the boundary-scan nets and pins, classifying them into basic testability groups. The report also recommends where to add test point pads for physical "bed-of-nails" access if additional test coverage is required using other test methods.

For complete information on ScanExpress DFT Analyzer, please refer to the detailed datasheet for this product.

Datasheet.

 

ScanExpress Runner
Test Program Execution

ScanExpress Runner™ is a run-time boundary-scan execution environment which provides the capability to execute boundary-scan tests and perform In-System Programming in a pre-planned, specific order called a test plan. Test vectors and device programming information generated using ScanExpress TPG, ScanExpress JET, or ScanExpress Flash Generator, are executed and the test results can be displayed on-screen and logged to a file.  Infrastructure, interconnect, resistor and memory tests are executed using a Corelis proprietary Compact Vector Format (CVF) file. This file format maximizes test coverage while minimizing the file size. Other formats such as SVF, JAM, and STAPL are also supported for in-system programming. Any number of different test steps can be combined into a test plan. Test steps within a test plan may be added, removed, reordered, enabled, or disabled. These test steps can be executed sequentially, repeated any number of times, or run continuously. Other features of the ScanExpress Runner test executive include:

  • Pass/Fail test sequence execution and failure reporting
  • Test sequence debugging by forcing selected test steps to skip, stop on failure, or continue
  • Detailed and summary test results and reports to a file
  • Prints test results
  • Allows data entry for operator name, UUT name, model number, serial number, etc.
  • Flow control for changing the flow of test execution dynamically based on previous test results
  • Support for Extensible Test Format (ETF) allowing control of external test equipment such as relay controllers and digital multi-meters
  • Bar code reader support
  • Support for execution from third party test applications and executives
  • Support with any Corelis boundary-scan Controller

The main ScanExpress Runner window provides an overview of all test steps and the results of each executed test step. When repeating or looping test steps, these results are displayed both for each individual test as well as for the total test runs executed. When a test step fails, the user has the option to either ignore the result and continue to the next test step or display the vectors in a truth table format to determine the cause of the failure. An optional add-on module called ScanExpress ADO is available with ScanExpress Runner that offers automatic truth table analysis and pin-points failures to the net and pin level. ScanExpress ADO is useful for test operators that have little or no technical background.

For complete information on ScanExpress Runner, please refer to the detailed datasheet for this product..

Datasheet,

 

Runner Gang
ScanExpress Runner Gang
High Volume Test Program Execution

ScanExpress Runner Gang is a high-throughput and high-volume solution for boundary-scan production test applications. The software enables concurrent boundary-scan testing and In-System Programming (ISP) of CPLDs and Flash devices on multiple boards using a single PC.  The most common production test stations provide capability to test 4, 8, and 32 boards in parallel.

The ScanExpress Runner Gang boundary-scan run-time environment provides the capability to execute boundary-scan tests and perform ISP in a pre-planned, specific order called a test plan. Test vectors, generated using ScanExpress TPG, are executed and the test results can be displayed on-screen and logged to a file. Infrastructure, interconnect, resistor and memory tests are executed using a Corelis proprietary Compact Vector Format (CVF) file. This file format maximizes test coverage while minimizing the file size. Other formats such as SVF, JAM, and STAPL are also supported for in-system programming. Any number of different test steps can be combined into a test plan. Test steps within a test plan may be added, removed, reordered, enabled, or disabled. These test steps can be executed sequentially, repeated any number of times, or run continuously. Each test step is simultaneously executed on each connected UUT offering true concurrent testing. The primary features of the ScanExpress Runner Gang test executive include:

  • Concurrent boundary-scan testing and ISP of CPLDs and Flash devices for up to 32 boards
  • Concurrent hardware comparison of expected patterns against observed results for each UUT
  • Pre-power up test for shorts between power and ground lines on each UUT
  • Pass/Fail test sequence execution and failure reporting
  • Test sequence debugging by forcing selected test steps to skip, stop on failure, or continue
  • Detailed and summary test results and reports to a file
  • Prints test results
  • Allows data entry for operator name, UUT name, model number, serial number, etc.
  • Flow control for changing the flow of test execution dynamically based on previous test results
  • Support for Extensible Test Format (ETF) allowing control of external test equipment such as relay controllers and digital multi-meters
  • Bar code reader support
  • Automatic serial number entry
  • Support for execution from third party test applications and executives
  • Support with any Corelis boundary-scan controller

The main ScanExpress Runner Gang window provides a top-level view of each UUT and the overall test results for each board. Users can maneuver further to see each UUT test step, the results of each test step, and ultimately the identification of failures using the detailed truth table diagnostics. An optional add-on module called ScanExpress Advanced Diagnostics Option (ADO) is available with ScanExpress Runner Gang that offers automatic truth table analysis and pin-points failures to the net and pin level. ScanExpress ADO is useful for test operators that have little or no technical background.

For complete information on ScanExpress Runner Gang, please refer to the detailed datasheet for this product.

Datasheet,

 

Runner Gang
ScanExpress Runner Click
Simplify Test Program Execution for the Operator

SContract manufacturers and off-shore manufacturers often need to run boundary-scan tests using non-technical operators who have limited computer knowledge and applications experience. The standard Corelis ScanExpress Runner gang tester and programmer application, one of the easiest programs to use in its class, is often too complex for such personnel to operate without errors and confusion. This is especially true when testing different types of Units Under Test (UUTs) which requires loading test plan (".tsp") files from various directories on a network drive in a remote manufacturing facility.

Based on inquiries from contract manufacturers, Corelis has created a special purpose Windows application program specifically for contract manufacturers that is designed to minimize operator errors and further simplify the test process.

The operator is presented with a simple Graphical User Interface (GUI) which only requires the test operator to enter the serial numbers of the UUTs and the program will then automatically find the correct test plan (".tsp") file related to these particular serial numbers and execute the tests. The boundary-scan test process of first entering a serial number and then clicking the RUN button is simple and not error prone which is very suitable for a manufacturing environment. The GUI is compatible with wedge type optical bar-code readers and production test personnel can even use this program without a keyboard by using an optical bar-code reader.

The Express RunnerClick application program will only execute on computers with an installed and licensed ScanExpress Runner application. The Express RunnerClick program calls the ScanExpress Runner DLL and runs the various boundary-scan tests usingScanExpress Runner, but without the ScanExpress Runner GUI.

As shown below, this program presents a simple, single-dialog user interface that is easy and safe to use and can be utilized by low-skill operators.

 

ScanExpress ADO
Advanced Diagnostics Option

ScanExpress ADO is an add-on option for the ScanExpress Runner and ScanExpress Runner Gang execution environments. The Advanced Diagnostics Option automates test vector analysis by intelligently deciphering standard truth table diagnostic information and presenting specific fault information to the user in a detailed verbose format. Net and pin level diagnostics information is given for a wide range of tests including infrastructure, interconnect, resistor, and external memories. Other features of the ScanExpress ADOinclude:

  • Quickly identifies bridging faults, opens and stuck-at conditions
  • Clear fault identification down to the net and pin level
  • Detailed fault report logs
  • Proximity diagnostics
  • Records deterministic and non-deterministic faults
  • Net, pin, and boundary-scan characteristic identification

ScanExpress ADO seamlessly integrates with the ScanExpress Runner test executive requiring no additional learning curve by the user. Once installed, ADO can generate fault reports that are compatible with ScanExpress Viewer to provide superior photographic visual failure analysis.

For complete information on ScanExpress ADO, please refer to the detailed datasheet for this product.

Datasheet,

 

ScanExpress Viewer
Visual Fault Identification System

ScanExpress Viewer is a powerful graphical fault identification system that helps to isolate the source and location of faults encountered during boundary-scan testing of printed circuit board (PCB) assemblies. By combining the visual aspects of a photographic image of the PCB assembly with the detailed pad layout information supplied by an industry standard IPC-D-356A netlist, a complete visual representation of the target system is created that facilitates the quick isolation of any failure under investigation.

ScanExpress Viewer allows users with little or no boundary-scan to experience the complete ability to pinpoint the exact source and location of PCB assembly failures. This is true for even the most complex boards and systems with faults that cannot be seen by the naked eye or cannot be detected using x-ray or optical inspection. While the tool is tailored primarily for the manufacturing, testing, and repair processes, ScanExpress Viewer offers a variety of features suited for the design engineer as well such as a parts locator giving the ability to quickly locate small components on a PCB that has no silkscreen or searchable layout drawings.

ScanExpress Viewer requires failure data to be created from ScanExpress Runner using theAdvanced Diagnostics Option (ADO). For complete information on ScanExpress Viewer, please refer to the detailed datasheet for this product.

Datasheet.

 

ScanExpress JET
Extending Boundary-Scan with JTAG Embedded Functional Test

ScanExpress JET™ represents a quantum leap in automatic circuit board testing. The JTAG Embedded Test (JET) method extends boundary-scan structural test coverage to virtually every signal that is accessible by the on-board CPU(s).

ScanExpress JET utilizes proprietary JTAG Embedded Test technology, which uses a processor's JTAG debug port to download and control native processor code where at-speed functional testing of the Unit Under Test (UUT) is performed. In addition to providing test coverage for non-JTAG components, this technology also allows programming of flash memories at their fastest theoretical programming speed.

View the ScanExpress JET Whitepaper which provides an overview of what JET is, how it works, and the benefits of using JET in conjunction with existing boundary-scan and ICT test methods.

Datasheet.

 

ScanExpress Debugger
Interactive Debugging

ScanExpress Debugger™ is an excellent tool for engineers doing debug during prototype design verification and testing. It is very useful for finding shorts and opens on and between BGA devices and other fine-pitch components. ScanExpress Debugger allows interactive control and observation of all the boundary-scan controllable inputs and outputs on a Unit Under Test (UUT). It can also apply data to inputs of clusters and read their responses if the cluster I/Os are accessible via boundary-scan components. The ScanExpress Debugger software includes an interactive Graphical User Interface (GUI), as shown to the right, that assists the user in setting and monitoring the state of pins on the UUT. A powerful Pin and Netlist browser with filtering and sorting capabilities allows you to easily select the pins and/or nets of interest and insert them into the main debug window for various data manipulation. All debug sessions can be saved and later recalled for reuse.

For complete information on ScanExpress Debugger, please refer to the detailed datasheet for this product.

Datasheet.


ScanExpress Merge
System Level testing across Assemblies

Traditional boundary-scan testing has been primarily used as a complete test and programming solution for single printed circuit board (PCB) assemblies. New technology and software now allow boundary-scan testing to be easily extended to test systems that consist of multiple PCBs, treating them as a single, combined unit.

ScanExpress Merge™ provides users the capability to fully test boundary-scan interconnections across assemblies and modules. This tool can be used to combine multiple target assemblies and treat them as a single boundary-scan compatible target system. ScanExpress Merge has many applications, including:

  • Motherboard and Daughter card(s) assembly testing
  • Multiple card chassis testing
  • Gang testing of multiple cards

As motherboard and daughter card assemblies become more commonplace, interconnect testing between these assemblies becomes more critical. The figure to the right depicts a typical multi-assembly system where two daughter boards plug into a main board. Without ScanExpress Merge, interconnect testing for each assembly would be isolated within each module. With ScanExpress Merge, the three assemblies are combined together providing interconnect testability between all three. ScanExpress Merge can be used in a similar manner for any system topology. By preprocessing the test data files of each of the assemblies, ScanExpress Merge generates a unified set of input files that are compatible with Corelis’ ScanExpress TPG Test Pattern Generator. ScanExpress TPG will automatically process the merged assemblies and generate test vectors for the entire combined system, thereby extending boundary-scan testing and programming to the system level. ScanExpress Merge provides an exceptionally easy-to-use setup wizard that contains step-by-step instructions creating a mistake-free environment.

ScanExpress Merge can also automate the process of testing external board I/O and traces that are connected to DIMM memory sockets and connectors. ScanExpress Merge combines the data of the board and the data of the Corelis’ SCANIO parallel I/O modules into a single set of merged input files that are compatible with ScanExpress TPG. Adding support for boundary-scan parallel I/O modules saves time by eliminating the need to describe the connections between the PCB connectors and the modules. To further simplify operations, ScanExpress Merge automatically adds a prefix to the names of items that are associated with each assembly such as net names, reference designators, etc. This allows the user to uniquely identify each assembly within the combined system and to properly diagnose faults when the complete system is tested. The default prefix is optional for each of the merged assemblies and can be specified by the user.

For boards that plug directly into one another via a one-to-one connector, ScanExpress Merge automatically finds and connects the relevant nets on both sides of the connector. The user is only required to specify which connectors are mated. This feature is very useful when using daughter cards that plug into motherboards or cards that plug into a backplane. In addition, ScanExpress Merge automatically generates connection lists for mated connectors and generates suggested wire lists for connections to Corelis SCANIO modules. This allows an engineer to follow ScanExpress Merge’s recommended connection list rather than having to prepare a separate SCANIO-to-UUT connection list manually.

For complete information on ScanExpress Merge, please refer to the detailed datasheet for this product.

Datasheet.